Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Boosting combinatorial search through randomization
AAAI '98/IAAI '98 Proceedings of the fifteenth national/tenth conference on Artificial intelligence/Innovative applications of artificial intelligence
GRASP: A Search Algorithm for Propositional Satisfiability
IEEE Transactions on Computers
A Computing Procedure for Quantification Theory
Journal of the ACM (JACM)
Model checking
An efficient learning procedure for multiple implication checks
Proceedings of the conference on Design, automation and test in Europe
A machine program for theorem-proving
Communications of the ACM
Circuit-based Boolean Reasoning
Proceedings of the 38th annual Design Automation Conference
SATIRE: a new incremental satisfiability engine
Proceedings of the 38th annual Design Automation Conference
Symbolic Model Checking
Efficient conflict driven learning in a boolean satisfiability solver
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Checking Safety Properties Using Induction and a SAT-Solver
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Symbolic Model Checking without BDDs
TACAS '99 Proceedings of the 5th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Robust Search Algorithms for Test Pattern Generation
FTCS '97 Proceedings of the 27th International Symposium on Fault-Tolerant Computing (FTCS '97)
Accelerating Bounded Model Checking of Safety Properties
Formal Methods in System Design
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Accelerated verification of RTL assertions based on satisfiability solvers
HLDVT '02 Proceedings of the Seventh IEEE International High-Level Design Validation and Test Workshop
Applying SMT in symbolic execution of microcode
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
Directed test generation for validation of multicore architectures
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world
Incremental verification with mode variable invariants in state machines
NFM'12 Proceedings of the 4th international conference on NASA Formal Methods
Implicative simultaneous satisfiability and applications
HVC'11 Proceedings of the 7th international Haifa Verification conference on Hardware and Software: verification and testing
Asynchronous multi-core incremental SAT solving
TACAS'13 Proceedings of the 19th international conference on Tools and Algorithms for the Construction and Analysis of Systems
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We present several algorithms for simultaneous SAT (propositional satisfiability) based model checking of safety properties. More precisely, we focus on Bounded Model Checking and Temporal Induction methods for simultaneously verifying multiple safety properties on the same model. The most efficient among our proposed algorithms for model checking are based on a simultaneous propositional satisfiability procedure (SSAT for short), which we design for solving related propositional objectives simultaneously, by sharing the learned clauses and the search. The SSAT algorithm is fully incremental in the sense that all clauses learned while solving one objective can be reused for the remaining objectives. Furthermore, our SSAT algorithm ensures that the SSAT solver will never re-visit the same sub-space during the search, even if there are several satisfiability objectives, hence one traversal of the search space is enough. Finally, in SSAT all SAT objectives are watched simultaneously, thus we can solve several other SAT objectives when the search is oriented to solve a particular SAT objective first. Experimental results on Intel designs demonstrate that our new algorithms can be orders of magnitude faster than the previously known techniques in this domain.