Verification of large synthesized designs
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Equivalence checking using cuts and heaps
DAC '97 Proceedings of the 34th annual Design Automation Conference
Model checking
Sequential equivalence checking without state space traversal
Proceedings of the conference on Design, automation and test in Europe
SATIRE: a new incremental satisfiability engine
Proceedings of the 38th annual Design Automation Conference
Formal Equivalence Checking and Design DeBugging
Formal Equivalence Checking and Design DeBugging
A Tutorial on Stålmarck‘s Proof Procedure for PropositionalLogic
Formal Methods in System Design - Special issue on formal methods for computer-added design
SAT-Based Verification without State Space Traversal
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Checking Safety Properties Using Induction and a SAT-Solver
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Symbolic Model Checking without BDDs
TACAS '99 Proceedings of the 5th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Robust Search Algorithms for Test Pattern Generation
FTCS '97 Proceedings of the 27th International Symposium on Fault-Tolerant Computing (FTCS '97)
Accelerating Bounded Model Checking of Safety Properties
Formal Methods in System Design
DAG-aware circuit compression for formal verification
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Dynamic transition relation simplification for bounded property checking
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Accelerated verification of RTL assertions based on satisfiability solvers
HLDVT '02 Proceedings of the Seventh IEEE International High-Level Design Validation and Test Workshop
Improvements to combinational equivalence checking
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Decision Procedures: An Algorithmic Point of View
Decision Procedures: An Algorithmic Point of View
Invariant-strengthened elimination of dependent state elements
Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design
Handbook of Satisfiability: Volume 185 Frontiers in Artificial Intelligence and Applications
Handbook of Satisfiability: Volume 185 Frontiers in Artificial Intelligence and Applications
Speculative reduction-based scalable redundancy identification
Proceedings of the Conference on Design, Automation and Test in Europe
Generating diverse solutions in SAT
SAT'11 Proceedings of the 14th international conference on Theory and application of satisfiability testing
Simultaneous SAT-Based model checking of safety properties
HVC'05 Proceedings of the First Haifa international conference on Hardware and Software Verification and Testing
Efficient SAT solving under assumptions
SAT'12 Proceedings of the 15th international conference on Theory and Applications of Satisfiability Testing
EPR-based bounded model checking at word level
IJCAR'12 Proceedings of the 6th international joint conference on Automated Reasoning
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This paper proposes an efficient algorithm for the systematic learning of implications. This is done as part of a new search and restart strategy in the SAT solver. We evaluate the new algorithm within a number of applications, including BMC and induction with invariant strengthening for equivalence checking. We provide extensive experimental evidence attesting to a speedup of one and often two orders of magnitude with our algorithm, on a representative set of industrial and publicly available test suites, as compared to a basic version of invariant strengthening. Moreover, we show that the new invariant strengthening algorithm alone performs better than induction and interpolation, and that the absolutely best result is achieved when it is combined with interpolation. In addition, we experimentally demonstrate the superiority of an application of our new algorithm to BMC.