Testability analysis and behavioral testing of the Hopfield neural paradigm

Authors:
C. Alippi;Franco Fummi;V. Piuri;M. Sami;Donatella Sciuto
Affiliations:
Department of Electronics and Information, Politecnico di Milano, Milano, Italy;Department of Electronics and Information, Politecnico di Milano, Milano, Italy;Department of Electronics and Information, Politecnico di Milano, Milano, Italy;Department of Electronics and Information, Politecnico di Milano, Milano, Italy;Department of Electronics and Information, Politecnico di Milano, Milano, Italy
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
1998

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Abstract

Testability analysis and test pattern generation for neural architectures can be performed at a very high abstraction level on the computational paradigm. In this paper, we consider the case of Hopfield's networks, as the simplest example of networks with feedback loops. A behavioral error model based on finite-state machines (FSM's) is introduced. Conditions for controllability, observability and global testability are derived to verify errors excitation and propagation to outputs. The proposed behavioral test pattern generator creates the minimum length test sequence for any digital implementation.