Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
A deterministic algorithm for sparse multivariate polynomial interpolation
STOC '88 Proceedings of the twentieth annual ACM symposium on Theory of computing
Fast parallel algorithms for sparse multivariate polynomial interpolation over finite fields
SIAM Journal on Computing
On zero-testing and interpolation of k -sparse multivariate polynomials over finite fields
Theoretical Computer Science
Applying coding theory to sparse interpolation
SIAM Journal on Computing
Error control systems for digital communication and storage
Error control systems for digital communication and storage
Efficient Exponentiation of a Primitive Root in GF(2m)
IEEE Transactions on Computers
Fast Arithmetic for Public-Key Algorithms in Galois Fields with Composite Exponents
IEEE Transactions on Computers
Mastrovito Multiplier for General Irreducible Polynomials
IEEE Transactions on Computers
Fast Algorithms for Digital Signal Processing
Fast Algorithms for Digital Signal Processing
Representations of Discrete Functions
Representations of Discrete Functions
A Multiple-Valued Reed-Muller Transform for Incompletely Specified Functions
IEEE Transactions on Computers
A Deterministic Multivariate Interpolation Algorithm for Small Finite Fields
IEEE Transactions on Computers
BDD Decomposition for Efficient Logic Synthesis
ICCD '99 Proceedings of the 1999 IEEE International Conference on Computer Design
On the Construction of Multiple-Valued Decision Diagrams
ISMVL '02 Proceedings of the 32nd International Symposium on Multiple-Valued Logic
Proceedings of the conference on Design, automation and test in Europe
High-Speed, Low-Complexity Systolic Designs of Novel Iterative Division Algorithms in GF(2^m)
IEEE Transactions on Computers
MODD: A New Decision Diagram and Representation for Multiple Output Binary Functions
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Bit-Parallel Finite Field Multipliers for Irreducible Trinomials
IEEE Transactions on Computers
Low complexity bit parallel architectures for polynomial basis multiplication over GF(2m)
IEEE Transactions on Computers
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This paper presents an efficient technique for synthesis and optimization of polynomials over GF(2m), where m is a non-zero positive integer. The technique is based on a graph-based decomposition and factorization of polynomials over GF(2m), followed by efficient network factorization and optimization. A technique for efficiently computing coefficients over GF(pm), where p is a prime number, is first presented. The coefficients are stored as polynomial graphs over GF(pm). The synthesis and optimization is initiated from this graph based representation. The technique has been applied to minimize multipliers over all the 51 fields in GF(2k), k = 2...8 in 0.18 micron CMOS technology with the help of the Synopsys® design compiler. It has also been applied to minimize combinational exponentiation circuits, and other multivariate bit- as well as word-level polynomials. The experimental results suggest that the proposed technique can reduce area, delay, and power by significant amount.