Body-voltage estimation in digital PD-SOI circuits and its application to static timing analysis

Authors:
Kenneth L. Shepard;Dae-Jin Kim
Affiliations:
Columbia Integrated Systems Lab, Department of Electrical Engineering, Columbia University, New York, NY;Columbia Integrated Systems Lab, Department of Electrical Engineering, Columbia University, New York, NY
Venue:
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Year:
1999

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Abstract

We describe a technique for estimating the floating body potentials of partially-depleted silicon-on-insulator (PD-SOI) circuits under steady switching activity and under initial activity after a long period of quiescence. The approach is based on a unique state diagram abstraction of the PD-SOI FET that captures all of the essential device physics. This picture yields a simple analytic model of the body voltage which is used within the context of a prototype transistor-level static timing analysis engine. Results are presented that demonstrate the accuracy of the analytic body-voltage model and the reduction in delay uncertainty possible with this technique.