Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Sequential circuit verification using symbolic model checking
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Zero-suppressed BDDs for set manipulation in combinatorial problems
DAC '93 Proceedings of the 30th international Design Automation Conference
Espresso-signature: a new exact minimizer for logic functions
DAC '93 Proceedings of the 30th international Design Automation Conference
A new viewpoint on two-level logic minimization
DAC '93 Proceedings of the 30th international Design Automation Conference
Calculation of unate cube set algebra using zero-suppressed BDDs
DAC '94 Proceedings of the 31st annual Design Automation Conference
Polynomial circuit models for component matching in high-level synthesis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - System Level Design
PolyBoRi: A framework for Gröbner-basis computations with Boolean polynomials
Journal of Symbolic Computation
Semantically driven mutation in genetic programming
CEC'09 Proceedings of the Eleventh conference on Congress on Evolutionary Computation
VSOP (valued-sum-of-products) calculator for knowledge processing based on zero-suppressed BDDs
Proceedings of the 2005 international conference on Federation over the Web
Incremental set recommendation based on class differences
PAKDD'12 Proceedings of the 16th Pacific-Asia conference on Advances in Knowledge Discovery and Data Mining - Volume Part I
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We present a new technique that broadens the scope of BDD application. It involves manipulating arithmetic polynomials containing higher-degree variables and integer coefficients. Our method can represent large-scale polynomials compactly and uniquely, and it greatly accelerates computation of polynomials. As the polynomial calculus is a basic model in mathematics, our method is very useful in various areas, including formal verification techniques for VLSI design.