Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Automated multi-cycle symbolic timing verification of microprocessor-based designs
DAC '94 Proceedings of the 31st annual Design Automation Conference
Waiting false path analysis of sequential logic circuits for performance optimization
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
An implication-based method to detect multi-cycle paths in large sequential circuits
Proceedings of the 39th annual Design Automation Conference
Functionally Testable Path Delay Faults on a Microprocessor
IEEE Design & Test
Fixed points for multi-cycle path detection
Proceedings of the Conference on Design, Automation and Test in Europe
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In this paper we enhance the performance of multi-cycle path analysis in an industrial setting. Industrial designs are, in general, more complicated, but contain more information than fundamental sequential circuits. We show how such information is used for improving the quality and the efficiency of multi-cycle path analysis. Specifically, we propose local FSM learning to take into account reachability information. We also propose FF enable learning to accelerate multi-cycle path analysis. Experimental results show that our methods can handle large industrial designs with tens of thousands of FFs and detects more multi-cycle paths faster than conventional ones.