Adequate proof principles for invariance and liveness properties of concurrent programs
Science of Computer Programming
Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Efficient fair queueing using deficit round-robin
IEEE/ACM Transactions on Networking (TON)
Chaff: engineering an efficient SAT solver
Proceedings of the 38th annual Design Automation Conference
Proving the Correctness of Multiprocess Programs
IEEE Transactions on Software Engineering
Checking Safety by Inductive Generalization of Counterexamples to Induction
FMCAD '07 Proceedings of the Formal Methods in Computer Aided Design
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Within the formal verification community, choosing between liveness and safety approaches has long been a subject of debate. This paper applies both approaches to a common design in the networking industry, a Deficit Weighted Round Robin (DWRR) arbiter. It then presents the tradeoffs we encountered while applying both approaches and also describes how we overcame state space explosion. We also describe two real post-silicon design bugs that we found, which were missed by all simulation methods.