Compositional Verification for Component-Based Systems and Application
ATVA '08 Proceedings of the 6th International Symposium on Automated Technology for Verification and Analysis
D-Finder: A Tool for Compositional Deadlock Detection and Verification
CAV '09 Proceedings of the 21st International Conference on Computer Aided Verification
SAT-Solving in Practice, with a Tutorial Example from Supervisory Control
Discrete Event Dynamic Systems
Approximation refinement for interpolation-based model checking
VMCAI'08 Proceedings of the 9th international conference on Verification, model checking, and abstract interpretation
SAT-based model checking without unrolling
VMCAI'11 Proceedings of the 12th international conference on Verification, model checking, and abstract interpretation
IC3: where monolithic and incremental meet
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
Efficient implementation of property directed reachability
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
An incremental approach to model checking progress properties
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
SAT'12 Proceedings of the 15th international conference on Theory and Applications of Satisfiability Testing
Incremental, inductive CTL model checking
CAV'12 Proceedings of the 24th international conference on Computer Aided Verification
Liveness vs safety: a practical viewpoint
HVC'11 Proceedings of the 7th international Haifa Verification conference on Hardware and Software: verification and testing
Minimal sets over monotone predicates in boolean formulae
CAV'13 Proceedings of the 25th international conference on Computer Aided Verification
Reasoning about state constraints in the situation calculus
IJCAI'13 Proceedings of the Twenty-Third international joint conference on Artificial Intelligence
Hi-index | 0.00 |
Scaling verification to large circuits requires some form of abstraction relative to the asserted property. We describe a safety analysis of finite-state systems that generalizes from counterexamples to the inductiveness of the safety specification to inductive invariants. It thus abstracts the system's state space relative to the property. The analysis either strengthens a safety specification to be inductive or discovers a counterexample to its correctness. The analysis is easily made parallel. We provide experimental data showing how the analysis time decreases with the number of processes on several hard problems.