Symbolic model checking: 1020 states and beyond
Information and Computation - Special issue: Selections from 1990 IEEE symposium on logic in computer science
Temporal verification of reactive systems: safety
Temporal verification of reactive systems: safety
An axiomatic basis for computer programming
Communications of the ACM
Chaff: engineering an efficient SAT solver
Proceedings of the 38th annual Design Automation Conference
POPL '77 Proceedings of the 4th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Checking Safety Properties Using Induction and a SAT-Solver
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Symbolic Model Checking without BDDs
TACAS '99 Proceedings of the 5th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Construction of Abstract State Graphs with PVS
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Applying SAT Methods in Unbounded Symbolic Model Checking
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Counterexample-guided abstraction refinement for symbolic model checking
Journal of the ACM (JACM)
Fast illegal state identification for improving SAT-based induction
Proceedings of the 43rd annual Design Automation Conference
Automatic invariant strengthening to prove properties in bounded model checking
Proceedings of the 43rd annual Design Automation Conference
Checking Safety by Inductive Generalization of Counterexamples to Induction
FMCAD '07 Proceedings of the Formal Methods in Computer Aided Design
Applying logic synthesis for speeding up SAT
SAT'07 Proceedings of the 10th international conference on Theory and applications of satisfiability testing
Effective preprocessing in SAT through variable and clause elimination
SAT'05 Proceedings of the 8th international conference on Theory and Applications of Satisfiability Testing
IC3: where monolithic and incremental meet
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
Efficient implementation of property directed reachability
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
Incremental formal verification of hardware
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
An incremental approach to model checking progress properties
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
Formal Methods in System Design
SAT'12 Proceedings of the 15th international conference on Theory and Applications of Satisfiability Testing
Generalized property directed reachability
SAT'12 Proceedings of the 15th international conference on Theory and Applications of Satisfiability Testing
Taking satisfiability to the next level with z3
IJCAR'12 Proceedings of the 6th international joint conference on Automated Reasoning
EPR-based bounded model checking at word level
IJCAR'12 Proceedings of the 6th international joint conference on Automated Reasoning
IC3 and beyond: incremental, inductive verification
CAV'12 Proceedings of the 24th international conference on Computer Aided Verification
Software model checking via IC3
CAV'12 Proceedings of the 24th international conference on Computer Aided Verification
Formal verification and validation of ERTMS industrial railway train spacing system
CAV'12 Proceedings of the 24th international conference on Computer Aided Verification
Incremental, inductive CTL model checking
CAV'12 Proceedings of the 24th international conference on Computer Aided Verification
SMT-Based induction methods for timed systems
FORMATS'12 Proceedings of the 10th international conference on Formal Modeling and Analysis of Timed Systems
SAT-based model checking: interpolation, IC3 and beyond
TACAS'13 Proceedings of the 19th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Intertwined forward-backward reachability analysis using interpolants
TACAS'13 Proceedings of the 19th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Handling unbounded loops with ESBMC 1.20
TACAS'13 Proceedings of the 19th international conference on Tools and Algorithms for the Construction and Analysis of Systems
QF BV model checking with property directed reachability
Proceedings of the Conference on Design, Automation and Test in Europe
Using cubes of non-state variables with property directed reachability
Proceedings of the Conference on Design, Automation and Test in Europe
Core minimization in SAT-based abstraction
Proceedings of the Conference on Design, Automation and Test in Europe
Optimization techniques for craig interpolant compaction in unbounded model checking
Proceedings of the Conference on Design, Automation and Test in Europe
Synthesis of feedback decoders for initialized encoders
Proceedings of the 50th Annual Design Automation Conference
A counterexample-guided interpolant generation algorithm for SAT-based model checking
Proceedings of the 50th Annual Design Automation Conference
Scalable progress verification in credit-based flow-control systems
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Inductive invariant generation via abductive inference
Proceedings of the 2013 ACM SIGPLAN international conference on Object oriented programming systems languages & applications
Propositional temporal proving with reductions to a SAT problem
CADE'13 Proceedings of the 24th international conference on Automated Deduction
Incremental, inductive coverability
CAV'13 Proceedings of the 25th international conference on Computer Aided Verification
Efficient generation of small interpolants in CNF
CAV'13 Proceedings of the 25th international conference on Computer Aided Verification
Learning universally quantified invariants of linear data structures
CAV'13 Proceedings of the 25th international conference on Computer Aided Verification
Automatic abstraction in SMT-Based unbounded software model checking
CAV'13 Proceedings of the 25th international conference on Computer Aided Verification
Computing interpolants without proofs
HVC'12 Proceedings of the 8th international conference on Hardware and Software: verification and testing
Proceedings of the 41st ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages
Reasoning about state constraints in the situation calculus
IJCAI'13 Proceedings of the Twenty-Third international joint conference on Artificial Intelligence
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A new form of SAT-based symbolic model checking is described. Instead of unrolling the transition relation, it incrementally generates clauses that are inductive relative to (and augment) stepwise approximate reachability information. In this way, the algorithm gradually refines the property, eventually producing either an inductive strengthening of the property or a counterexample trace. Our experimental studies show that induction is a powerful tool for generalizing the unreachability of given error states: it can refine away many states at once, and it is effective at focusing the proof search on aspects of the transition system relevant to the property. Furthermore, the incremental structure of the algorithm lends itself to a parallel implementation.