Chaff: engineering an efficient SAT solver
Proceedings of the 38th annual Design Automation Conference
To SAT or Not to SAT: Scalable Exploration of Functional Dependency
IEEE Transactions on Computers
Synthesizing complementary circuits automatically
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
SAT-based model checking without unrolling
VMCAI'11 Proceedings of the 12th international conference on Verification, model checking, and abstract interpretation
Towards completely automatic decoder synthesis
Proceedings of the International Conference on Computer-Aided Design
Efficient implementation of property directed reachability
Proceedings of the International Conference on Formal Methods in Computer-Aided Design
A Halting Algorithm to Determine the Existence of the Decoder
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Encoding and decoding are common practice in data processing. Designing encoder and decoder circuitry manually can be error prone and time consuming. Although great progress has been made on automating decoder synthesis from its encoder specification, prior specification was limited to an uninitialized encoder only, whose decoder in turn cannot depend on the entire execution history of the encoder. Prior decoder existence condition is unnecessarily stringent as encoders are often initialized to some specific starting states. This paper shows how decoders of initialized encoders can be practically synthesized. Experimental results demonstrate effective decoder synthesis of initialized encoders, beyond existing methods' capabilities.