Chaff: engineering an efficient SAT solver
Proceedings of the 38th annual Design Automation Conference
Symbolic Model Checking without BDDs
TACAS '99 Proceedings of the 5th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Low Power Error Resilient Encoding for On-Chip Data Buses
Proceedings of the conference on Design, automation and test in Europe
Error Correction Coding: Mathematical Methods and Algorithms
Error Correction Coding: Mathematical Methods and Algorithms
Introduction to Data Compression, Third Edition (Morgan Kaufmann Series in Multimedia Information and Systems)
Introduction to Cryptography with Coding Theory (2nd Edition)
Introduction to Cryptography with Coding Theory (2nd Edition)
Interpolating functions from large Boolean relations
Proceedings of the 2009 International Conference on Computer-Aided Design
To SAT or Not to SAT: Scalable Exploration of Functional Dependency
IEEE Transactions on Computers
Synthesizing complementary circuits automatically
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Coding for system-on-chip networks: a unified framework
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A halting algorithm to determine the existence of decoder
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
When boolean satisfiability meets gaussian elimination in a simplex way
CAV'12 Proceedings of the 24th international conference on Computer Aided Verification
Synthesis of feedback decoders for initialized encoders
Proceedings of the 50th Annual Design Automation Conference
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Upon receiving the output sequence streaming from a sequential encoder, a decoder reconstructs the corresponding input sequence that streamed to the encoder. Such an encoding and decoding scheme is commonly encountered in communication, cryptography, signal processing, and other applications. Given an encoder specification, decoder design can be error-prone and time consuming. Its automation may help designers improve productivity and justify encoder correctness. Though recent advances showed promising progress, there is still no complete method that decides whether a decoder exists for a finite state transition system. The quest for completely automatic decoder synthesis remains. This paper presents a complete and practical approach to automating decoder synthesis via incremental SAT solving and Craig interpolation. Experiments show that, for decoder-existent cases, our method synthesizes decoders effectively; for decoder-nonexistent cases, our method concludes the non-existence instantly while prior methods may fail.