Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Transformations and decompositions of nets
Advances in Petri nets 1986, part I on Petri nets: central models and their properties
Handshake circuits: an asynchronous architecture for VLSI programming
Handshake circuits: an asynchronous architecture for VLSI programming
An Improvement of McMillan's Unfolding Algorithm
Formal Methods in System Design
Lectures on Petri Nets I: Basic Models, Advances in Petri Nets, the volumes are based on the Advanced Course on Petri Nets
Decomposition in Asynchronous Circuit Design
Concurrency and Hardware Design, Advances in Petri Nets
ILP Models for the Synthesis of Asynchronous Control Circuits
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Improved Decomposition of STGs
ACSD '05 Proceedings of the Fifth International Conference on Application of Concurrency to System Design
State encoding of large asynchronous controllers
Proceedings of the 43rd annual Design Automation Conference
Logic synthesis for asynchronous circuits based on STG unfoldings and incremental SAT
Fundamenta Informaticae - Special issue on application of concurrency to system design (ACSD'04)
Strategies for Optimised STG Decomposition
ACSD '06 Proceedings of the Sixth International Conference on Application of Concurrency to System Design
Detecting State Encoding Conflicts in STG Unfoldings Using SAT
Fundamenta Informaticae - Application of Concurrency to System Design (ACSD'03)
Determinate STG decomposition of marked graphs
ICATPN'05 Proceedings of the 26th international conference on Applications and Theory of Petri Nets
Component refinement and CSC solving for STG decomposition
FOSSACS'05 Proceedings of the 8th international conference on Foundations of Software Science and Computation Structures
Output-Determinacy and Asynchronous Circuit Synthesis
Fundamenta Informaticae - Application of Concurrency to System Design, the Sixth Special Issue
Avoiding Irreducible CSC Conflicts by Internal Communication
Fundamenta Informaticae - Application of Concurrency to System Design
Efficient automatic resolution of encoding conflicts using STG unfoldings
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Avoiding Irreducible CSC Conflicts by Internal Communication
Fundamenta Informaticae - Application of Concurrency to System Design
Output-Determinacy and Asynchronous Circuit Synthesis
Fundamenta Informaticae - Application of Concurrency to System Design, the Sixth Special Issue
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For synthesising efficient asynchronous circuits one has to deal with the state space explosion problem. In this paper, we present a combined approach to alleviate it, based on using Petri net unfoldings and decomposition. The experimental results show significant improvement in terms of runtime compared with other existing methods.