Transformations and decompositions of nets
Advances in Petri nets 1986, part I on Petri nets: central models and their properties
Arbiters: an exercise in specifying and decomposing asynchronously communicating components
Science of Computer Programming
Handshake circuits: an asynchronous architecture for VLSI programming
Handshake circuits: an asynchronous architecture for VLSI programming
Concurrent hardware: the theory and practice of self-timed design
Concurrent hardware: the theory and practice of self-timed design
On the models for asynchronous circuit behaviour with OR causality
Formal Methods in System Design
What is the cost of delay insensitivity?
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Communication and Concurrency
Decidability and Complexity of Petri Net Problems - An Introduction
Lectures on Petri Nets I: Basic Models, Advances in Petri Nets, the volumes are based on the Advanced Course on Petri Nets
Decomposition in Asynchronous Circuit Design
Concurrency and Hardware Design, Advances in Petri Nets
Structural Transformations Giving B-Equivalent PT-Nets
Selected Papers from the 3rd European Workshop on Applications and Theory of Petri Nets
ILP Models for the Synthesis of Asynchronous Control Circuits
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
State encoding of large asynchronous controllers
Proceedings of the 43rd annual Design Automation Conference
Strategies for Optimised STG Decomposition
ACSD '06 Proceedings of the Sixth International Conference on Application of Concurrency to System Design
Improved Decomposition of Signal Transition Graphs
Fundamenta Informaticae - The Fourth Special Issue on Applications of Concurrency to System Design (ACSD05)
Combining decomposition and unfolding for STG synthesis
ICATPN'07 Proceedings of the 28th international conference on Applications and theory of Petri nets and other models of concurrency
Component refinement and CSC solving for STG decomposition
FOSSACS'05 Proceedings of the 8th international conference on Foundations of Software Science and Computation Structures
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Signal Transition Graphs (STG) are a formalism for the description of asynchronous circuit behaviour. In this paper we propose (and justify) a formal semantics of non-deterministic STGs with dummies and OR-causality. For this, we introduce the concept of output-determinacy, which is a relaxation of determinism, and argue that it is reasonable and useful in the speed-independent context. We apply the developed theory to improve an STG decomposition algorithm used to tackle the state explosion problem during circuit synthesis, and present some experimental data for this improved algorithm and some benchmark examples.