Reachability in cyclic extended free-choice systems
Selected papers of the 3rd workshop on Concurrency and compositionality
Handshake circuits: an asynchronous architecture for VLSI programming
Handshake circuits: an asynchronous architecture for VLSI programming
Free choice Petri nets
A structural encoding technique for the synthesis of asynchronous circuits
Fundamenta Informaticae - Application of concurrency to system design
Checking System Properties via Integer Programming
ESOP '96 Proceedings of the 6th European Symposium on Programming Languages and Systems
Lectures on Petri Nets I: Basic Models, Advances in Petri Nets, the volumes are based on the Advanced Course on Petri Nets
Checking properties of nets using transformation
Advances in Petri Nets 1985, covers the 6th European Workshop on Applications and Theory in Petri Nets-selected papers
Using Unfoldings to Avoid the State Explosion Problem in the Verification of Asynchronous Circuits
CAV '92 Proceedings of the Fourth International Workshop on Computer Aided Verification
Detecting State Coding Conflicts in STG Unfoldings Using SAT
ACSD '03 Proceedings of the Third International Conference on Application of Concurrency to System Design
Detecting State Coding Conflicts in STGs Using Integer Programming
Proceedings of the conference on Design, automation and test in Europe
Sequential optimization of asynchronous and synchronous finite-state machines: algorithms and tools
Sequential optimization of asynchronous and synchronous finite-state machines: algorithms and tools
Structural methods for the synthesis of speed-independent circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
State encoding of large asynchronous controllers
Proceedings of the 43rd annual Design Automation Conference
Component refinement and CSC-solving for STG decomposition
Theoretical Computer Science
Improved Decomposition of Signal Transition Graphs
Fundamenta Informaticae - The Fourth Special Issue on Applications of Concurrency to System Design (ACSD05)
On the Complexity of Consistency and Complete State Coding for Signal Transition Graphs
Fundamenta Informaticae - Application of Concurrency to System Design (ACSD'06)
Output-Determinacy and Asynchronous Circuit Synthesis
Fundamenta Informaticae - Application of Concurrency to System Design, the Sixth Special Issue
Combining decomposition and unfolding for STG synthesis
ICATPN'07 Proceedings of the 28th international conference on Applications and theory of Petri nets and other models of concurrency
Component refinement and CSC solving for STG decomposition
FOSSACS'05 Proceedings of the 8th international conference on Foundations of Software Science and Computation Structures
Effective contraction of timed STGs for decomposition based timed circuit synthesis
ATVA'06 Proceedings of the 4th international conference on Automated Technology for Verification and Analysis
On the Complexity of Consistency and Complete State Coding for Signal Transition Graphs
Fundamenta Informaticae - Application of Concurrency to System Design (ACSD'06)
Output-Determinacy and Asynchronous Circuit Synthesis
Fundamenta Informaticae - Application of Concurrency to System Design, the Sixth Special Issue
Improved Decomposition of Signal Transition Graphs
Fundamenta Informaticae - The Fourth Special Issue on Applications of Concurrency to System Design (ACSD05)
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A new technique for the logic synthesis of asynchronous circuits is presented. It is based on the structural theory of Petri nets and integer linear programming. The techniqueis capable of checking implementability conditions, such as,complete state coding, and deriving a gate netlist to implement the specified behavior. This technique can synthesize specifications with few thousands of transitions in the Petrinet, providing a speed-up of several orders of magnitudewith regard to other existing techniques.