Transformations and decompositions of nets
Advances in Petri nets 1986, part I on Petri nets: central models and their properties
Arbiters: an exercise in specifying and decomposing asynchronously communicating components
Science of Computer Programming
Handshake circuits: an asynchronous architecture for VLSI programming
Handshake circuits: an asynchronous architecture for VLSI programming
Decomposition in Asynchronous Circuit Design
Concurrency and Hardware Design, Advances in Petri Nets
Structural Transformations Giving B-Equivalent PT-Nets
Selected Papers from the 3rd European Workshop on Applications and Theory of Petri Nets
An Asynchronous Low-Power 80C51 Microcontroller
ASYNC '98 Proceedings of the 4th International Symposium on Advanced Research in Asynchronous Circuits and Systems
Proceedings of the 41st annual Design Automation Conference
Component refinement and CSC-solving for STG decomposition
Theoretical Computer Science
Improved Decomposition of Signal Transition Graphs
Fundamenta Informaticae - The Fourth Special Issue on Applications of Concurrency to System Design (ACSD05)
Combining decomposition and unfolding for STG synthesis
ICATPN'07 Proceedings of the 28th international conference on Applications and theory of Petri nets and other models of concurrency
Determinate STG decomposition of marked graphs
ICATPN'05 Proceedings of the 26th international conference on Applications and Theory of Petri Nets
Synthesis of asynchronous controllers using integer linear programming
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Encoding Large Asynchronous Controllers With ILP Techniques
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Resynthesis of handshake specifications obtained e.g. from BALSA or TANGRAM with speed-independent logic synthesis from STGs is a promising approach. To deal with state-space explosion,we suggested STG decomposition; a problemis that decomposition can lead to irreducible CSC conflicts. Here, we present a new approach to solve such conflicts by introducing internal communication between the components. We give some first, very encouraging results for very large STGs concerning synthesis time and circuit area.