Logic Synthesis of Handshake Components Using Structural Clustering Techniques
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Characterizing asynchronous variable latencies through probability distribution functions
Microprocessors & Microsystems
Avoiding Irreducible CSC Conflicts by Internal Communication
Fundamenta Informaticae - Application of Concurrency to System Design
Efficient automatic resolution of encoding conflicts using STG unfoldings
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Avoiding Irreducible CSC Conflicts by Internal Communication
Fundamenta Informaticae - Application of Concurrency to System Design
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A novel strategy for the logic synthesis of asynchronous control circuits is presented. It is based on the structural theory of Petri nets and integer linear programming. Techniques that are capable of checking implementability conditions, such as complete state coding, and deriving a gate netlist to implement the specified behavior are presented. These techniques can handle Petri net specifications consisting of several thousands of transitions and provide a significant speed-up compared with techniques that have previously been proposed