Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
The future of system design languages (panel session)
Proceedings of the 37th Annual Design Automation Conference
Structured Component Composition Frameworks for Embedded System Design
HiPC '02 Proceedings of the 9th International Conference on High Performance Computing
SEAS: a system for early analysis of SoCs
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Early and accurate analysis of SoCs: oxymoron or real?
Proceedings of the 2004 international workshop on System level interconnect prediction
Unified Component Integration Flow for Multi-Processor SoC Design and Validation
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Early analysis tools for system-on-a-chip design
IBM Journal of Research and Development
A General Framework for Analysing System Properties in Platform-Based Embedded System Designs
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Introspection in System-Level Language Frameworks: Meta-Level vs. Integrated
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
A Mask Reuse Methodology for Reducing System-on-a-Chip Cost
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
HERMES: an infrastructure for low area overhead packet-switching networks on chip
Integration, the VLSI Journal - Special issue: Networks on chip and reconfigurable fabrics
System-Level Design Methodology with Direct Execution For Multiprocessors on SoPC
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Combining simulation and formal methods for system-level performance analysis
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Structural component composition for system-level models
Formal methods and models for system design
Tornado: A self-reconfiguration control system for core-based multiprocessor CSoPCs
Journal of Systems Architecture: the EUROMICRO Journal
Reconfigurable on-board vision processing for small autonomous vehicles
EURASIP Journal on Embedded Systems
Secure Ethernet Point-to-Point Links for Autonomous Electronic Ballot Boxes
ATC '08 Proceedings of the 5th international conference on Autonomic and Trusted Computing
Embedding Intelligence into EDA Tools
Proceedings of the 2006 conference on Integrated Intelligent Systems for Engineering Design
Slotless module-based reconfiguration of embedded FPGAs
ACM Transactions on Embedded Computing Systems (TECS)
Reliable And Secure Chip Level Communication By Residue Number System Code
Journal of Integrated Design & Process Science
Automated instrumentation of FPGA-based systems for system-level transaction monitoring
SOC'09 Proceedings of the 11th international conference on System-on-chip
I2CSec: A secure serial Chip-to-Chip communication protocol
Journal of Systems Architecture: the EUROMICRO Journal
An autonomous fault tolerant system for CAN communications
IEA/AIE'10 Proceedings of the 23rd international conference on Industrial engineering and other applications of applied intelligent systems - Volume Part III
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Assembling a system on a chip using IP blocks is an error-prone, labor-intensive, and time-consuming process. Emerging high-level tools can help by automating many of the design tasks.