Rectification of multiple logic design errors in multiple output circuits

  • Authors:
  • Masahiro Tomita;Tamotsu Yamamoto;Fuminori Sumikawa;Kotaro Hirano

  • Affiliations:
  • The Graduate School of Science and Technology, Kobe University, 1-1, Rokko-dai, Nada, Kobe, 657, Japan;Semiconductor CAD Engineering Dept., Toshiba Corp., 580-1, Horikawa-cho, Saiwai-ku, Kawasaki, 210, Japan;The Graduate School of Science and Technology, Kobe University, 1-1, Rokko-dai, Nada, Kobe, 657, Japan;The Graduate School of Science and Technology, Kobe University, 1-1, Rokko-dai, Nada, Kobe, 657, Japan

  • Venue:
  • DAC '94 Proceedings of the 31st annual Design Automation Conference
  • Year:
  • 1994

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Abstract