Locating functional errors in logic circuits
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Diagnosis and correction of logic design errors in digital circuits
DAC '93 Proceedings of the 30th international Design Automation Conference
On error correction in macro-based circuits
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Rectification of multiple logic design errors in multiple output circuits
DAC '94 Proceedings of the 31st annual Design Automation Conference
A method for automatic design error location and correction in combinational logic circuits
Journal of Electronic Testing: Theory and Applications
On diagnosis and correction of design errors
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Multiple error diagnosis based on xlists
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Modeling the unknown! Towards model-independent fault and error diagnosis
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Connection Errors Location and Correction in Combinational Circuits
EDTC '97 Proceedings of the 1997 European conference on Design and Test
A Fast Algorithm for Locating and Correcting Simple Design Errors in VLSI Digital Circuits
GLS '97 Proceedings of the 7th Great Lakes Symposium on VLSI
Error Diagnosis of Sequential Circuits Using Region-Based Model
VLSID '01 Proceedings of the The 14th International Conference on VLSI Design (VLSID '01)
Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Testing, Verification, and Diagnosis in the Presence of Unknowns
VTS '00 Proceedings of the 18th IEEE VLSI Test Symposium
ErrorTracer: design error diagnosis based on fault simulation techniques
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
| Hi-index | 0.00 |
The rising trend in large scale integration and designcomplexity has greatly increased the need for efficient design error diagnosis. We present techniques for fast andefficient error diagnosis of digital circuits by eliminating to a large extent the set of false candidates identifiedby the diagnosis. The elimination of false candidate regions is conducted via distinguishing X's, flipping of values at the output of candidate regions, and combinationof these techniques. Our algorithms help to improve boththe speed and resolution of error diagnosis. Experimental results on combinational benchmark circuits showedthat up to 92% improvement in diagnostic resolution and74% speedup over the original region-based diagnosis canbe achieved with our approaches.