DAGON: technology binding and local optimization by DAG matching
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Locating logic design errors via test generation and don't-care propagation
EURO-DAC '92 Proceedings of the conference on European design automation
Rectification method for lookup-table type FPGA's
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Logic Minimization Algorithms for VLSI Synthesis
Logic Minimization Algorithms for VLSI Synthesis
ACCORD: Automatic Catching and CORrection of Logic Design Errors in Combinatorial Circuits
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Location of Stuck-At Faults and Bridging Faults Based on Circuit Partitioning
IEEE Transactions on Computers
Multiple error diagnosis based on xlists
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Logic Design Validation via Simulation and Automatic Test Pattern Generation
Journal of Electronic Testing: Theory and Applications
Design Error Diagnosis with Re-Synthesis in Combinational Circuits
Journal of Electronic Testing: Theory and Applications
Incremental logic rectification
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Simulation-Based Design Error Diagnosis and Correction in Combinational Digital Circuits
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
On Efficient Error Diagnosis of Digital Circuits
ITC '01 Proceedings of the 2001 IEEE International Test Conference
ErrorTracer: A Fault Simulation-Based Approach to Design Erorr Diagnosis
ITC '97 Proceedings of the 1997 IEEE International Test Conference
Error Diagnosis of Sequential Circuits Using Region-Based Model
Journal of Electronic Testing: Theory and Applications
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We consider the problem of correcting errors in a macro-based circuit. Our formulation of the problem allows the correction of errors that arise both in the context of design error correction, before the circuit is realized, and in the context where a physical circuit needs to be corrected. Two error classes are defined, namely, component errors and line errors. Both single and multiple errors are considered. Accurate correction procedures are given for single errors. Heuristics are given for correcting multiple errors. Experimental results are given to demonstrate the correction procedures presented.