Locating logic design errors via test generation and don't-care propagation
EURO-DAC '92 Proceedings of the conference on European design automation
Diagnosis and correction of logic design errors in digital circuits
DAC '93 Proceedings of the 30th international Design Automation Conference
On error correction in macro-based circuits
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Rectification of multiple logic design errors in multiple output circuits
DAC '94 Proceedings of the 31st annual Design Automation Conference
Error diagnosis for transistor-level verification
DAC '94 Proceedings of the 31st annual Design Automation Conference
On diagnosis and correction of design errors
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Fault-simulation based design error diagnosis for sequential circuits
DAC '98 Proceedings of the 35th annual Design Automation Conference
Error Tracer: A Fault-Simualtion-Based Approach to Design Error Diagnosis
Proceedings of the IEEE International Test Conference
ACCORD: Automatic Catching and CORrection of Logic Design Errors in Combinatorial Circuits
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Modeling the unknown! Towards model-independent fault and error diagnosis
ITC '98 Proceedings of the 1998 IEEE International Test Conference
HITEC: a test generation package for sequential circuits
EURO-DAC '91 Proceedings of the conference on European design automation
Logic Design Validation via Simulation and Automatic Test Pattern Generation
Journal of Electronic Testing: Theory and Applications
A Symbolic Inject-and-Evaluate Paradigm for Byzantine Fault Diagnosis
Journal of Electronic Testing: Theory and Applications
On Efficient Error Diagnosis of Digital Circuits
ITC '01 Proceedings of the 2001 IEEE International Test Conference
A Technique for Identifying RTL and Gate-Level Correspondences
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Error Diagnosis of Sequential Circuits Using Region-Based Model
Journal of Electronic Testing: Theory and Applications
Generation of shorter sequences for high resolution error diagnosis using sequential SAT
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
On the relation between simulation-based and SAT-based diagnosis
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Accurate Whole-Chip Diagnostic Strategy for Scan Designs with Multiple Faults
Journal of Electronic Testing: Theory and Applications
Fault diagnosis of physical defects using unknown behavior model
Journal of Computer Science and Technology
Multiple defect diagnosis using no assumptions on failing pattern characteristics
Proceedings of the 45th annual Design Automation Conference
System-on-Chip Test Architectures: Nanometer Design for Testability
System-on-Chip Test Architectures: Nanometer Design for Testability
Diagnosis of integrated circuits with multiple defects of arbitrary characteristics
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special issue on the 2009 ACM/IEEE international symposium on networks-on-chip
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