On Efficient Error Diagnosis of Digital Circuits
ITC '01 Proceedings of the 2001 IEEE International Test Conference
Error Diagnosis of Sequential Circuits Using Region-Based Model
Journal of Electronic Testing: Theory and Applications
Generation of shorter sequences for high resolution error diagnosis using sequential SAT
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Multiple defect diagnosis using no assumptions on failing pattern characteristics
Proceedings of the 45th annual Design Automation Conference
Accurate rank ordering of error candidates for efficient HDL design debugging
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Diagnosis of integrated circuits with multiple defects of arbitrary characteristics
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special issue on the 2009 ACM/IEEE international symposium on networks-on-chip
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Algorithms to locate multiple design errors using region-based model are studied for both combinational and sequential circuits. The model takes locality aspect of errors and is based on a 3-value, non-numerative analysis technique. Studies show the effectiveness of the region based model for gate connection and gate substitution errors. For sequential circuits, we try to locate the time frame at which the error was first excited, by re-simulating as few vectors as possible preceding the erroneous vector in a fully initialized circuit to carry out the diagnosis. Exprimental results on benchmark circuits are used to demonstrate rapid and accurate locating of multiple errors.