Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Journal of the ACM (JACM)
Who are the variables in your neighborhood
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Dynamic variable ordering for ordered binary decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
FPGA routing and routability estimation via Boolean satisfiability
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
GRASP: A Search Algorithm for Propositional Satisfiability
IEEE Transactions on Computers
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Can recursive bisection alone produce routable placements?
Proceedings of the 37th Annual Design Automation Conference
A machine program for theorem-proving
Communications of the ACM
A comparative study of two Boolean formulations of FPGA detailed routing constraints
Proceedings of the 2001 international symposium on Physical design
Chaff: engineering an efficient SAT solver
Proceedings of the 38th annual Design Automation Conference
Faster SAT and smaller BDDs via common function structure
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Fine-Grain Conjunction Scheduling for Symbolic Reachability Analysis
TACAS '02 Proceedings of the 8th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Generic ILP versus specialized 0-1 ILP: an update
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Optimal partitioners and end-case placers for standard-cell layout
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Managing space for finite-state verification
Proceedings of the 28th international conference on Software engineering
Symbolic Techniques in Satisfiability Solving
Journal of Automated Reasoning
Efficient compilation techniques for large scale feature models
GPCE '08 Proceedings of the 7th international conference on Generative programming and component engineering
A lightweight component caching scheme for satisfiability solvers
SAT'07 Proceedings of the 10th international conference on Theory and applications of satisfiability testing
Variable and clause ordering in an FSA approach to propositional satisfiability
CIAA'11 Proceedings of the 16th international conference on Implementation and application of automata
Algorithms for synthesizing priorities in component-based systems
ATVA'11 Proceedings of the 9th international conference on Automated technology for verification and analysis
Extended resolution proofs for conjoining BDDs
CSR'06 Proceedings of the First international computer science conference on Theory and Applications
Using DPLL for efficient OBDD construction
SAT'04 Proceedings of the 7th international conference on Theory and Applications of Satisfiability Testing
CirCUs: a hybrid satisfiability solver
SAT'04 Proceedings of the 7th international conference on Theory and Applications of Satisfiability Testing
Model-Based diagnosis through OBDD compilation: a complexity analysis
Reasoning, Action and Interaction in AI Theories and Systems
Variable ordering for efficient SAT search by analyzing constraint-variable dependencies
SAT'05 Proceedings of the 8th international conference on Theory and Applications of Satisfiability Testing
Computing a hierarchical static order for decision diagram-based representation from p/t nets
Transactions on Petri Nets and Other Models of Concurrency V
A finite state intersection approach to propositional satisfiability
Theoretical Computer Science
Towards distributed software model-checking using decision diagrams
CAV'13 Proceedings of the 25th international conference on Computer Aided Verification
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The MINCE heuristic for variable-ordering [1] can successfully reduce the size of BDDs and accelerate SAT-solving. Applications to reachability analysis have also been successful [12]. The main drawback of MINCE is its implementation complexity - the authors used a pre-existing min-cut placer [6] that is several times larger than any existing SAT solver. Tweaking MINCE is difficult.In this work we propose a replacement heuristic, FORCE which is easy to implement from scratch and tweak. It is dramatically faster than MINCE in practice. While FORCE may produce seemingly inferior variable orderings, the difference with MINCE orderings does not affect subsequent SAT-solving.