Algorithms for synthesizing priorities in component-based systems

  • Authors:
  • Chih-Hong Cheng;Saddek Bensalem;Yu-Fang Chen;Rongjie Yan;Barbara Jobstmann;Harald Ruess;Christian Buckl;Alois Knoll

  • Affiliations:
  • Department of Informatics, Technischen Universität München, München, Germany;Verimag Laboratory, Grenoble, France;Institute of Information Science, Academia Sinica, Taipei, Taiwan;State Key Laboratory of Computer Science, ISCAS, Beijing, China;Verimag Laboratory, Grenoble, France;fortiss GmbH, München, Germany;fortiss GmbH, München, Germany;Department of Informatics, Technischen Universität München, München, Germany

  • Venue:
  • ATVA'11 Proceedings of the 9th international conference on Automated technology for verification and analysis
  • Year:
  • 2011

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Abstract

We present algorithms to synthesize component-based systems that are safe and deadlock-free using priorities, which define stateless-precedence between enabled actions. Our core method combines the concept of fault-localization (using safety-game) and fault-repair (using SAT for conflict resolution). For complex systems, we propose three complementary methods as preprocessing steps for priority synthesis, namely (a) data abstraction to reduce component complexities, (b) alphabet abstraction and #-deadlock to ignore components, and (c) automated assumption learning for compositional priority synthesis.