Modeling Heterogeneous Real-time Components in BIP
SEFM '06 Proceedings of the Fourth IEEE International Conference on Software Engineering and Formal Methods
Model construction and priority synthesis for simple interaction systems
NFM'11 Proceedings of the Third international conference on NASA Formal methods
Achieving distributed control through model checking
CAV'10 Proceedings of the 22nd international conference on Computer Aided Verification
Algorithms for synthesizing priorities in component-based systems
ATVA'11 Proceedings of the 9th international conference on Automated technology for verification and analysis
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We study properties of priority synthesis [2], an automatic method to ensure desired safety properties in component-based systems using priorities. Priorities are a powerful concept to orchestrate components [3], e.g., the BIP framework [1] for designing and modeling embedded and autonomous systems is based on this concept. We formulate priority synthesis for BIP systems using the automata-theoretic framework proposed by Ramadge and Wonham [5]. In this framework, priority synthesis results in searching for a supervisor from the restricted class of supervisors, in which each is solidly expressible using priorities. While priority-based supervisors are easier to use, e.g., they support the construction of distributed protocols, they are harder to compute. In this paper, we focus on the hardness of synthesizing priorities and show that finding a supervisor based on priorities that ensures deadlock freedom of the supervised system is NP-complete.