Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
A VHDL primer (3rd ed.)
Using SAT for combinational equivalence checking
Proceedings of the conference on Design, automation and test in Europe
Verilog HDL Synthesis: A Practical Primer
Verilog HDL Synthesis: A Practical Primer
Fundamentals and Standards in Hardware Description Languages: Proceedings of the NATO Advanced Study Institute, in Ciocco, Barga, Italy, April 16-26, 1993
The VERILOG Hardware Description Language
The VERILOG Hardware Description Language
Combinational and sequential equivalence checking
Logic Synthesis and Verification
NuSMV 2: An OpenSource Tool for Symbolic Model Checking
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
On automated grading of programming assignments in an academic institution
Computers & Education
The Electronic Design Automation Handbook
The Electronic Design Automation Handbook
The boss online submission and assessment system
Journal on Educational Resources in Computing (JERIC)
Use of HDLs in teaching of computer hardware courses
WCAE '03 Proceedings of the 2003 workshop on Computer architecture education: Held in conjunction with the 30th International Symposium on Computer Architecture
The temporal logic of programs
SFCS '77 Proceedings of the 18th Annual Symposium on Foundations of Computer Science
Jutge.org: an educational programming judge
Proceedings of the 43rd ACM technical symposium on Computer Science Education
Jutge.org: an educational programming judge
Proceedings of the 43rd ACM technical symposium on Computer Science Education
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This paper investigates the use of formal verification techniques to create online judges that can assist in teaching logic circuit design. Formal verification not only contributes to give an exact assessment about correctness, but also saves the instructor the tedious task of designing test cases. The paper explains how formal verification has been integrated in an online judge. It also describes the courseware created for a course on logic circuits and the successful experience of using it in a one-week summer course with students from secondary and high school.