Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Theoretical Computer Science
An operational semantics for timed CSP
Information and Computation
Symbolic Model Checking
Proving Safety Properties for Embedded Control Systems
EDCC-2 Proceedings of the Second European Dependable Computing Conference on Dependable Computing
Border-Block Triangular Form and Conjunction Schedule in Image Computation
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Towards an Integrated Model Checker for Railway Signalling Data
FME '02 Proceedings of the International Symposium of Formal Methods Europe on Formal Methods - Getting IT Right
NuSMV 2: An OpenSource Tool for Symbolic Model Checking
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Efficient Model Checking by Automated Ordering of Transition Relation Partitions
CAV '94 Proceedings of the 6th International Conference on Computer Aided Verification
An Automatic SPIN Validation of a Safety Critical Railway Control System
DSN '00 Proceedings of the 2000 International Conference on Dependable Systems and Networks (formerly FTCS-30 and DCCA-8)
Modelling large railway interlockings and model checking small ones
ACSC '03 Proceedings of the 26th Australasian computer science conference - Volume 16
Abstract State Machines: A Method for High-Level System Design and Analysis
Abstract State Machines: A Method for High-Level System Design and Analysis
Tool support for checking railway interlocking designs
SCS '05 Proceedings of the 10th Australian workshop on Safety critical systems and software - Volume 55
Introducing time in an industrial application of model-checking
FMICS'07 Proceedings of the 12th international conference on Formal methods for industrial critical systems
Model-based variable and transition orderings for efficient symbolic model checking
FM'06 Proceedings of the 14th international conference on Formal Methods
Formal methods for intelligent transportation systems
ISoLA'12 Proceedings of the 5th international conference on Leveraging Applications of Formal Methods, Verification and Validation: applications and case studies - Volume Part II
Defining and model checking abstractions of complex railway models using CSP||B
HVC'12 Proceedings of the 8th international conference on Hardware and Software: verification and testing
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Interlockings implement Railway Signalling Principles which ensure the safe movements of trains along a track system. They are safety critical systems which require a thorough analysis. We are aiming at supporting the safety analysis by automated tools, namely model checkers. Model checking provides a full state space exploration and is thus intrinsically limited in the problem's state space. Current research focuses on extending these limits and pushing the boundaries. In our work we investigate possible optimisations for symbolic model checking. Symbolic model checkers exploit a compact representation of the model using Binary Decision Diagram. These structures provide a canonical representation which allows for reductions. The compactness of this data structure and possible reductions are dependent on two orderings: the ordering of variables and the ordering in which sub-structures are manipulated. This paper reports on findings of how a near to optimal ordering can be generated for the domain of interlocking verification.