Communicating sequential processes
Communicating sequential processes
Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Statecharts: A visual formalism for complex systems
Science of Computer Programming
A Calculus of Communicating Systems
A Calculus of Communicating Systems
Effective Theorem Proving for Hardware Verification
TPCD '94 Proceedings of the Second International Conference on Theorem Provers in Circuit Design - Theory, Practice and Experience
Automatic Model Refinement for Fast Architecture Exploration
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Validation Of Interface System Architecture
Journal of Integrated Design & Process Science
Hi-index | 0.00 |
This paper presents a formal approach to correctly refine a system specification to an architecture model. The tasks in the system specification are distributed onto components of the system architecture to derive the architecture model. We present this refinement step and use formalisms to prove that the derived architecture model is equivalent to the specification. This approach aims at solving the verification problem in system level design through gradual refinements that produce an equivalent output model at each step.