Optimal message-passing for data coherency in distributed architecture
Proceedings of the 15th international symposium on System Synthesis
Fast Exploration of Parameterized Bus Architecture for Communication-Centric SoC Design
Proceedings of the conference on Design, automation and test in Europe - Volume 1
On deriving equivalent architecture model from system specification
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Methods for evaluating and covering the design space during early design development
Integration, the VLSI Journal
Automatic network generation for system-on-chip communication design
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
A Systematic Approach to Exploring Embedded System Architectures at Multiple Abstraction Levels
IEEE Transactions on Computers
System-level architectural exploration using allocation-on-demand technique
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Documenting the Progress of the System Development
Methods, Models and Tools for Fault Tolerance
Parallel algorithms development for programmable devices with application from cryptography
International Journal of Parallel Programming
Synthesizing the F8 cryptographic algorithm for programmable devices
ACST '08 Proceedings of the Fourth IASTED International Conference on Advances in Computer Science and Technology
A case for visualization-integrated system-level design space exploration
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
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We present a methodology and algorithms for automatic refinement from a given design specification to an architecture model based on decisions in architecture exploration. An architecture model is derived from the specification through a series of well defined steps in our design methodology. Traditional architecture exploration relies on manual refinement which is painfully time consuming and error prone. The automation of the refinement process provides a useful tool to the system designer to quickly evaluate several architectures in the design space and make the optimal choice. Experiments with the tool on a system design example show the robustness and usefulness of the refinement algorithm.