Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Built-in test for VLSI: pseudorandom techniques
Built-in test for VLSI: pseudorandom techniques
On computing optimized input probabilities for random tests
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Improved Techniques for Estimating Signal Probabilities
IEEE Transactions on Computers
Efficient implementation of a BDD package
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Dynamic variable ordering for ordered binary decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
PROTEST: a tool for probabilistic testability analysis
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Design of an Efficient Weighted-Random-Pattern Generation System
Proceedings of the IEEE International Test Conference on TEST: The Next 25 Years
An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits
IEEE Transactions on Computers
On the Acceleration of Test Generation Algorithms
IEEE Transactions on Computers
On Optimizing BIST-Architecture by Using OBDD-based Approaches and Genetic Algorithms
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
16.2 A Structural Approach for Space Compaction for Concurrent Checking and BIST
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
| Hi-index | 0.00 |
Numerous methods have been divised to compute and to optimize fault detection probabilities for combinational circuits. The methods range from topological to algebraic. In combination with OBDDs algebraic methods have received more and more attention. Recently, an OBDD-based method has been presented which allows the computation of exact fault detection probabilities for many combinational circuits. In this paper we combine this method with strategies making use of necessary assignments (computed by an implication procedure). The experimental results show that the resulting method leads to a decrease of the time and space requirements for computing fault detection probabilities of the hard faults by a factor of 4 on average compared to the original algorithm. By this means it is now possible to efficiently use the OBDD-based approach also for the optimization of input probabilities for weighted random pattern testing. Since in contrast to other optimization procedures this method is based on the exact fault detection probabilities we succeed in the determination of weight sets of superior quality, i.e.~the test application time (number of random patterns) is considerably reduced compared to previous approaches.