Formal Verification and Hardware Design with Statecharts

  • Authors:
  • Jan Philipps;Peter Scholz

  • Affiliations:
  • -;-

  • Venue:
  • Proceedings of the ESPRIT Working Group 8533 on Prospects for Hardware Foundations: NADA - New Hardware Design Methods, Survey Chapters
  • Year:
  • 1998

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Abstract

Statecharts extend the concept of Mealy Machines by parallel composition, hierarchy, and broadcast communication. While Statecharts in principle are widely accepted in industry, some semantical concepts, especially broadcasting, are still contested. In this contribution, we present a Statechart dialect that includes the basic concepts of the language and present a formal, relational semantics for it. We show that this semantics can be used for both formal verification by model checking and hardware synthesis.