Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Verification of synchronous sequential machines based on symbolic execution
Proceedings of the international workshop on Automatic verification methods for finite state systems
Recurrence equations and the optimization of synchronous logic circuits
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Zero-suppressed BDDs for set manipulation in combinatorial problems
DAC '93 Proceedings of the 30th international Design Automation Conference
Input don't care sequences in FSM networks
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Compatible observability don't cares revisited
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Exact and heuristic algorithms for the minimization of incompletely specified state machines
EURO-DAC '91 Proceedings of the conference on European design automation
Sequential synthesis using S1S
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Multi-level logic optimization of FSM networks
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Optimization of synchronous circuits
Logic Synthesis and Verification
Sequential Permissible Functions and their Application to Circuit Optimization
EDTC '96 Proceedings of the 1996 European conference on Design and Test
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