Switching and Finite Automata Theory: Computer Science Series
Switching and Finite Automata Theory: Computer Science Series
Control optimization in high-level synthesis using behavioral don't cares
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Experiments on the synthesis and testability of non-scan finite state machines
EURO-DAC '92 Proceedings of the conference on European design automation
Boolean constrained encoding: a new formulation and a case study
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Permissible observability relations in FSM networks
DAC '94 Proceedings of the 31st annual Design Automation Conference
Multi-level logic optimization of FSM networks
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Controller optimization for protocol intensive applications
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Input don't care sequences in FSM networks
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Merging multiple FSM controllers for DFT/BIST hardware
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Low-Power FSMs in FPGA: Encoding Alternatives
PATMOS '02 Proceedings of the 12th International Workshop on Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation
FSM Decomposition for Low Power in FPGA
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Efficient induction of finite state automata
UAI'97 Proceedings of the Thirteenth conference on Uncertainty in artificial intelligence
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In this paper we present two exact algorithms for state minimization of FSM's. Our results prove that exact state minimization is feasible for a large class of practical examples, certainly including most hand-designed FSM's. We also present heuristic algorithms, that can handle large, machine-generated, FSM's. We argue that the true objective of state reduction should be reduction toward maximal encodability. The state mapping problem has received almost no prior attention in the literature. We show that mapping plays a significant role in delivering an optimally implemented reduced machine. We also introduce an algorithm whose main virtue is the ability to cope with very general cost functions, while providing very high performance.