Data-path synthesis using path analysis
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
BECOME: behavior level circuit synthesis based on structure mapping
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Logic Minimization Algorithms for VLSI Synthesis
Logic Minimization Algorithms for VLSI Synthesis
Exact and heuristic algorithms for the minimization of incompletely specified state machines
EURO-DAC '91 Proceedings of the conference on European design automation
LSS: a system for production logic synthesis
IBM Journal of Research and Development
High-level synthesis in an industrial environment
IBM Journal of Research and Development - Special issue: IBM CMOS technology
Efficient use of large don't cares in high-level and logic synthesis
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
HDL optimization using timed decision tables
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Synthesis of controllers for full testability of integrated datapath-controller pairs
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Synthesis-for-testability of controller-datapath pairs that use gated clocks
Proceedings of the 37th Annual Design Automation Conference
Verification of datapath and controller generation phase in high-level synthesis of digital circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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