Control optimization in high-level synthesis using behavioral don't cares
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Relational algebra as formalism for hardware design
EUROMICRO 93 Nineteenth EUROMICRO symposium on microprocessing and microprogramming on Open system design : hardware, software and applications: hardware, software and applications
Logic synthesis
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Behavior tables: a basis for system representation and transformational system synthesis
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Logic Design and Switching Theory
Logic Design and Switching Theory
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
Logic Minimization Algorithms for VLSI Synthesis
Logic Minimization Algorithms for VLSI Synthesis
IEEE Design & Test
Timed decision tables: A model for embedded system representation and optimization
Timed decision tables: A model for embedded system representation and optimization
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Limited exception modeling and its use in presynthesis optimizations
DAC '97 Proceedings of the 34th annual Design Automation Conference
Decomposition of timed decision tables and its use in presynthesis optimizations
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
HDL code restructuring using timed decision tables
Proceedings of the 6th international workshop on Hardware/software codesign
Behavioral-level partitioning for low power design in control-dominated application
GLSVLSI '00 Proceedings of the 10th Great Lakes symposium on VLSI
An algorithm to determine mutually exclusive operations in behavioral descriptions
Proceedings of the conference on Design, automation and test in Europe
Codesign of embedded systems: status and trends
Readings in hardware/software co-design
Codesign of Embedded Systems: Status and Trends
IEEE Design & Test
Compilation reuse and hybrid compilation: an experiment
ACM SIGPLAN Notices
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