Automated phase assignment for the synthesis of low power domino circuits

  • Authors:
  • Priyadarshan Patra;Unni Narayanan

  • Affiliations:
  • Strategic CAD Labs, Intel Corporation, JFT-104, 211 NE 25th Avenue, Hillsboro, OR;Design Technology, Intel Corporation, SC12-606, 2200 Mission College Boulevard, Santa Clara, CA

  • Venue:
  • Proceedings of the 36th annual ACM/IEEE Design Automation Conference
  • Year:
  • 1999

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Abstract