Minimum crosstalk switchbox routing
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Techniques for crosstalk avoidance in the physical design of high-performance digital systems
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Logic optimization by output phase assignment in dynamic logic synthesis
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Post global routing crosstalk risk estimation and reduction
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Noise in deep submicron digital design
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Digital sensitivity: predicting signal interaction using functional analysis
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
A spacing algorithm for performance enhancement and cross-talk reduction
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Global routing with crosstalk constraints
DAC '98 Proceedings of the 35th annual Design Automation Conference
Technology mapping for domino logic
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Crosstalk minimization using wire perturbations
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Automated phase assignment for the synthesis of low power domino circuits
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Reducing cross-coupling among interconnect wires in deep-submicron datapath design
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Implication graph based domino logic synthesis
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Wire routing by optimizing channel assignment within large apertures
DAC '71 Proceedings of the 8th Design Automation Workshop
Perturb and simplify: multilevel Boolean network optimizer
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Noise-aware power optimization for on-chip interconnect
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Crosstalk Minimization in Logic Synthesis for PLA
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Crosstalk minimization in logic synthesis for PLAs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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Based on the new concept of crosstalk immunity set (CIS), procedures to minimize capacitive cross-coupling effects are developed for domino logic circuit. The nets in a crosstalk immunity set are free from crosstalk effects for any combination of input vectors. New algorithms for CIS identification and minimization are proposed to maximize the chance of crosstalk minimization in routing step. Our routing algorithm augmented with CIS information searches for optimal solution to minimize maximum crosstalk the circuit would experience. Experimental results show that the reduction of maximum crosstalk is up to 30% with CIS-augmented routing.