Minimum crosstalk channel routing
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Post global routing crosstalk risk estimation and reduction
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
An optimal algorithm for river routing with crosstalk constraints
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
A practical clock router that accounts for the capacitance derived from parallel and cross segments
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Global routing with crosstalk constraints
DAC '98 Proceedings of the 35th annual Design Automation Conference
Timing and crosstalk driven area routing
DAC '98 Proceedings of the 35th annual Design Automation Conference
Optimal river routing with crosstalk constraints
ACM Transactions on Design Automation of Electronic Systems (TODAES)
ISPD '99 Proceedings of the 1999 international symposium on Physical design
Simultaneous shield insertion and net ordering for capacitive and inductive coupling minimization
ISPD '00 Proceedings of the 2000 international symposium on Physical design
ISPD '00 Proceedings of the 2000 international symposium on Physical design
Domino logic synthesis minimizing crosstalk
Proceedings of the 37th Annual Design Automation Conference
Formulae and applications of interconnect estimation considering shield insertion and net ordering
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Closed-Form Crosstalk Noise Delay Metrics
Analog Integrated Circuits and Signal Processing
Channel and Switchbox Routing with Minimized Crosstalk - A Parallel Genetic Algorithm Approach
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Incorporating Physical Design-For-Test Into Routing
ITC '97 Proceedings of the 1997 IEEE International Test Conference
Crosstalk-Constrained Performance Optimization by Using Wire Sizing and Perturbation
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Simultaneous shield insertion and net ordering for capacitive and inductive coupling minimization
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Shielding area optimization under the solution of interconnect crosstalk
Journal of Computer Science and Technology
Crosstalk-aware routing resource assignment
Journal of Computer Science and Technology
On pioneering nanometer-era routing problems
Proceedings of the 2012 ACM international symposium on International Symposium on Physical Design
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As technology advances, interconnection wires are placed in closer proximity. Consequently, reduction of crosstalks between interconnection wires becomes an important consideration in VLSI design. In this paper, we study the gridded switchbox routing problems with the objectives of satisfying crosstalk constraints and minimizing the total crosstalk in the nets. We propose a new approach to the problems which utilizes existing switchbox routing algorithms and improves upon the routing results by re-assigning the horizontal and vertical wire segments to rows and columns, respectively, in an interative fashion. This approach can also be applied to the channel routing problem with crosstalk constraints. A novel mixed ILP formulation and effective procedures for reducing the number of variables and constraints in the mixed ILP formulation are then presented. The experimental results are encouraging.