Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Languages and machines : an introduction to the theory of computer science
Languages and machines : an introduction to the theory of computer science
Introduction to algorithms
Design and validation of computer protocols
Design and validation of computer protocols
Fault models for testing in context
IFIP TC6/ 6.1 international conference on formal description techniques IX/protocol specification, testing and verification XVI on Formal description techniques IX : theory, application and tools: theory, application and tools
Switching and Finite Automata Theory: Computer Science Series
Switching and Finite Automata Theory: Computer Science Series
Verification of Large State/Event Systems Using Compositionality and Dependency Analysis
TACAS '98 Proceedings of the 4th International Conference on Tools and Algorithms for Construction and Analysis of Systems
A Practical and Complete Algorithm for Testing Real-Time Systems
FTRTFT '98 Proceedings of the 5th International Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems
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This paper presents a new approach, connectivity testing, for testing embedded systems. Instead of testing the conformance of a system against its specification, which often turns out to be infeasible, we suggest to test only the composition of the software and the hardware. We assume the software to be correct so only the hardware component may be erroneous. Our framework is based on the notion of a (single fault) fault model, that is a model which formally captures errors in the interface between the hardware and the software. Output and input fault models are considered. An exhaustive test suite for a fault model is a test suite that detects the faults of the model with 100% coverage. We prove the problem of computing a smallest exhaustive test suite to be NP-hard and devise heuristic polynomial time algorithms computing minimal exhaustive test suites. We have carried out experiments with the algorithms implemented using Binary Decision Diagrams. Test generation from specifications containing more than 4.98 × 1010 states have been carried out.