Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Binary decision diagrams and applications for VLSI CAD
Binary decision diagrams and applications for VLSI CAD
Dynamic variable ordering for ordered binary decision diagrams
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Using lower bounds during dynamic BDD minimization
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Fast Linearly Independent Arithmetic Expansions
IEEE Transactions on Computers
Logic Synthesis for Field-Programmable Gate Arrays
Logic Synthesis for Field-Programmable Gate Arrays
Minimizing ROBDD Sizes of Incompletely Specified Boolean Functions by Exploiting Strong Symmetries
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Linear Transformations and Exact Minimization of BDDs
GLS '98 Proceedings of the Great Lakes Symposium on VLSI '98
The computational complexity of equivalence and isomorphism problems
The computational complexity of equivalence and isomorphism problems
Quasi-Exact BDD Minimization Using Relaxed Best-First Search
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
Linearization of logical functions defined by a set of orthogonal terms. I. Theoretical aspects
Automation and Remote Control
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Algorithms for an approximate minimization of binary decision diagrams (BDD) on the basis of linear transformations of variables are proposed. The algorithms rely on the transformations of only adjacent variables and have a polynomial complexity relative to the size of the table that lists values of the function involved.