Logic Synthesis for Field-Programmable Gate Arrays

Logic synthesis for programmable gate arrays

DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference

Combinational logic synthesis for LUT based field programmable gate arrays

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Three parameters to find functional decompositions

ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference

Automated design synthesis and partitioning for adaptive reconfigurable hardware

Hardware implementation of intelligent systems

BDD-based logic synthesis for LUT-based FPGAs

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Special Purpose Image Convolution with Evolvable Hardware

Real-World Applications of Evolutionary Computing, EvoWorkshops 2000: EvoIASP, EvoSCONDI, EvoTel, EvoSTIM, EvoROB, and EvoFlight

Complexity Bounds for Lookup Table Implementation of Factored Forms in FPGA Technology Mapping

IPDPS '00 Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed Processing

Modular, Fabric-Specific Synthesis for Programmable Architectures

FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications

Decision Diagrams in Synthesis - Algorithms, Applications and Extensions

VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications

Low Power Technology Mapping for LUT based FPGA "A Genetic Algorithm Approach"

VLSID '03 Proceedings of the 16th International Conference on VLSI Design

A method to decompose multiple-output logic functions

Proceedings of the 41st annual Design Automation Conference

Approximate Algorithms for Minimization of Binary Decision Diagrams on the Basis of Linear Transformations of Variables

Automation and Remote Control

FPGA Design Automation: A Survey

Foundations and Trends in Electronic Design Automation