Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
A practical algorithm for exact array dependence analysis
Communications of the ACM
BI as an assertion language for mutable data structures
POPL '01 Proceedings of the 28th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Separation Logic: A Logic for Shared Mutable Data Structures
LICS '02 Proceedings of the 17th Annual IEEE Symposium on Logic in Computer Science
ACL2 Theorems About Commercial Microprocessors
FMCAD '96 Proceedings of the First International Conference on Formal Methods in Computer-Aided Design
Upgrading the Pre- and Postcondition Technique
VDM '91 Proceedings of the 4th International Symposium of VDM Europe on Formal Software Development-Volume I: Conference Contributions - Volume I
Enhancing the Pre- and Postcondition Technique for More Expressive Specifications
FM '99 Proceedings of the Wold Congress on Formal Methods in the Development of Computing Systems-Volume II
Microarchitecture Verification by Compositional Model Checking
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
Separation and information hiding
Proceedings of the 31st ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Transition predicate abstraction and fair termination
Proceedings of the 32nd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
An overview of JML tools and applications
International Journal on Software Tools for Technology Transfer (STTT) - Special section on formal methods for industrial critical systems
Relational inductive shape analysis
Proceedings of the 35th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Multiple Pre/Post Specifications for Heap-Manipulating Methods
HASE '07 Proceedings of the 10th IEEE High Assurance Systems Engineering Symposium
jStar: towards practical verification for java
Proceedings of the 23rd ACM SIGPLAN conference on Object-oriented programming systems languages and applications
An integrated proof language for imperative programs
Proceedings of the 2009 ACM SIGPLAN conference on Programming language design and implementation
Automated verification of shape and size properties via separation logic
VMCAI'07 Proceedings of the 8th international conference on Verification, model checking, and abstract interpretation
Dafny: an automatic program verifier for functional correctness
LPAR'10 Proceedings of the 16th international conference on Logic for programming, artificial intelligence, and reasoning
A quick tour of the VeriFast program verifier
APLAS'10 Proceedings of the 8th Asian conference on Programming languages and systems
Smallfoot: modular automatic assertion checking with separation logic
FMCO'05 Proceedings of the 4th international conference on Formal Methods for Components and Objects
The spec# programming system: an overview
CASSIS'04 Proceedings of the 2004 international conference on Construction and Analysis of Safe, Secure, and Interoperable Smart Devices
A HIP and SLEEK verification system
Proceedings of the ACM international conference companion on Object oriented programming systems languages and applications companion
HIPimm: verifying granular immutability guarantees
Proceedings of the ACM SIGPLAN 2014 Workshop on Partial Evaluation and Program Manipulation
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Conventional specifications typically have a flat structure that is based primarily on the underlying logic. Such specifications lack structures that could have provided better guidance to the verification process. In this work, we propose to add three new structures to a specification framework for separation logic to achieve a more precise and better guided verification for pointer-based programs. The newly introduced structures empower users with more control over the verification process in the following ways: (i) case analysis can be invoked to take advantage of disjointness conditions in the logic. (ii) early, as opposed to late, instantiation can minimise on the use of existential quantification. (iii) formulae that are staged provide better reuse of the verification process. Initial experiments have shown that structured specifications can lead to more precise verification without incurring any performance overhead.