Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
The Transduction Method-Design of Logic Networks Based on Permissible Functions
IEEE Transactions on Computers
Verification of synchronous sequential machines based on symbolic execution
Proceedings of the international workshop on Automatic verification methods for finite state systems
Chortle: a technology mapping program for lookup table-based field programmable gate arrays
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Logic synthesis for programmable gate arrays
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
A CAD system for the design of field programmable gate arrays
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Chortle-crf: Fast technology mapping for lookup table-based FPGAs
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Xmap: A technology mapper for table-lookup field-programmable gate arrays
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
A heuristic method for FPGA technology mapping based on the edge visibility
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
A resynthesis approach for network optimization
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Efficient sum-to-one subsets algorithm for logic optimization
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Logic Minimization Algorithms for VLSI Synthesis
Logic Minimization Algorithms for VLSI Synthesis
Technology mapping for a two-output RAM-based field programmable gate array
EURO-DAC '91 Proceedings of the conference on European design automation
Combinational logic synthesis for LUT based field programmable gate arrays
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A tutorial on logic synthesis for lookup-table based FPGAs
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Scalable don't-care-based logic optimization and resynthesis
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Scalable don't-care-based logic optimization and resynthesis
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
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