DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Chortle: a technology mapping program for lookup table-based field programmable gate arrays
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
A heuristic method for FPGA technology mapping based on the edge visibility
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Algorithms and Techniques for VLSI Layout and Synthesis
Algorithms and Techniques for VLSI Layout and Synthesis
Logic Minimization Algorithms for VLSI Synthesis
Logic Minimization Algorithms for VLSI Synthesis
FPGA design principles (a tutorial)
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Plane parallel a maze router and its application to FPGAs
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Maximal reduction of lookup-table based FPGAs
EURO-DAC '92 Proceedings of the conference on European design automation
On area/depth trade-off in LUT-based FPGA technology mapping
DAC '93 Proceedings of the 30th international Design Automation Conference
On nominal delay minimization in LUT-based FPGA technology mapping
FPGA '95 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays
PathFinder: a negotiation-based performance-driven router for FPGAs
FPGA '95 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays
Emerald: an architecture-driven tool compiler for FPGAs
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays
An optimal technology mapping algorithm for delay optimization in lookup-table based FPGA designs
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Tolerating operational faults in cluster-based FPGAs
FPGA '00 Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays
DAG-Map: Graph-Based FPGA Technology Mapping for Delay Optimization
IEEE Design & Test
On area/depth trade-off in LUT-based FPGA technology mapping
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A route system based on ant colony for coarse-grain reconfigurable architecture
ICNC'06 Proceedings of the Second international conference on Advances in Natural Computation - Volume Part II
Networked architecture for hybrid electrical energy storage systems
Proceedings of the 49th Annual Design Automation Conference
Run-time generation of partial FPGA configurations for subword operations
Microprocessors & Microsystems
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