Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Verification of synchronous sequential machines based on symbolic execution
Proceedings of the international workshop on Automatic verification methods for finite state systems
CAV '90 Proceedings of the 2nd International Workshop on Computer Aided Verification
Computing subsets of equivalence classes for large FSMs
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Formal Methods in System Design
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