Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
GRASP—a new search algorithm for satisfiability
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
A Computing Procedure for Quantification Theory
Journal of the ACM (JACM)
Using SAT for combinational equivalence checking
Proceedings of the conference on Design, automation and test in Europe
A machine program for theorem-proving
Communications of the ACM
Circuit-based Boolean Reasoning
Proceedings of the 38th annual Design Automation Conference
Chaff: engineering an efficient SAT solver
Proceedings of the 38th annual Design Automation Conference
Efficient conflict driven learning in a boolean satisfiability solver
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Symbolic Model Checking without BDDs
TACAS '99 Proceedings of the 5th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Applying SAT Methods in Unbounded Symbolic Model Checking
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
VIS: A System for Verification and Synthesis
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
A SAT Based Approach for Solving Formulas over Boolean and Linear Mathematical Propositions
CADE-18 Proceedings of the 18th International Conference on Automated Deduction
SATO: An Efficient Propositional Prover
CADE-14 Proceedings of the 14th International Conference on Automated Deduction
A fast pseudo-boolean constraint solver
Proceedings of the 40th annual Design Automation Conference
SAT-based unbounded symbolic model checking
Proceedings of the 40th annual Design Automation Conference
BerkMin: A Fast and Robust Sat-Solver
Proceedings of the conference on Design, automation and test in Europe
A Novel SAT All-Solutions Solver for Efficient Preimage Computation
Proceedings of the conference on Design, automation and test in Europe - Volume 1
A Comparative Study of Two Boolean Formulations of FPGA Detailed Routing Constraints
IEEE Transactions on Computers
SATORI - A Fast Sequential SAT Engine for Circuits
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Verification of Proofs of Unsatisfiability for CNF Formulas
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
CirCUs: a hybrid satisfiability solver
SAT'04 Proceedings of the 7th international conference on Theory and Applications of Satisfiability Testing
Prime clauses for fast enumeration of satisfying assignments to boolean circuits
Proceedings of the 42nd annual Design Automation Conference
Automatic invariant strengthening to prove properties in bounded model checking
Proceedings of the 43rd annual Design Automation Conference
Efficient Term-ITE Conversion for Satisfiability Modulo Theories
SAT '09 Proceedings of the 12th International Conference on Theory and Applications of Satisfiability Testing
Computing minimal diagnoses by greedy stochastic search
AAAI'08 Proceedings of the 23rd national conference on Artificial intelligence - Volume 2
Synthesizing complementary circuits automatically
Proceedings of the 2009 International Conference on Computer-Aided Design
Synthesizing complementary circuits automatically
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Approximate model-based diagnosis using greedy stochastic search
Journal of Artificial Intelligence Research
A novel SAT-based approach to the task graph cost-optimal scheduling problem
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An effective algorithm for and phase transitions of the directed hamiltonian cycle problem
Journal of Artificial Intelligence Research
SMT techniques for fast predicate abstraction
CAV'06 Proceedings of the 18th international conference on Computer Aided Verification
SMT-COMP: satisfiability modulo theories competition
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
A SAT based effective algorithm for the directed hamiltonian cycle problem
CSR'10 Proceedings of the 5th international conference on Computer Science: theory and Applications
SMT-based enumeration of object graphs from UML class diagrams
ACM SIGSOFT Software Engineering Notes
DNF hypotheses in explanatory induction
ILP'11 Proceedings of the 21st international conference on Inductive Logic Programming
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Finding all satisfying assignments of a propositional formula has many applications to the synthesis and verification of hardware and software. An approach to this problem that has recently emerged augments a clause-recording propositional satisfiability solver with the ability to add “blocking clauses.” One generates a blocking clause from a satisfying assignment by taking its complement. The resulting clause prevents the solver from visiting the same solution again. Every time a blocking clause is added the search is resumed until the instance becomes unsatisfiable. Various optimization techniques are applied to get smaller blocking clauses, since enumerating each satisfying assignment would be very inefficient. In this paper, we present an improved algorithm for finding all satisfying assignments for a generic Boolean circuit. Our work is based on a hybrid SAT solver that can apply conflict analysis and implications to both CNF formulae and general circuits. Thanks to this capability, reduction of the blocking clauses can be efficiently performed without altering the solver's state (e.g., its decision stack). This reduces the overhead incurred in resuming the search. Our algorithm performs conflict analysis on the blocking clause to derive a proper conflict clause for the modified formula. Besides yielding a valid, nontrivial backtracking level, the derived conflict clause is usually more effective at pruning the search space, since it may encompass both satisfiable and unsatisfiable points. Another advantage is that the derived conflict clause provides more flexibility in guiding the score-based heuristics that select the decision variables. The efficiency of our new algorithm is demonstrated by our preliminary results on SAT-based unbounded model checking of VIS benchmark models.