Unconstrained 0–1 optimization and Lagrangian relaxation
Selected papers on First international colloquium on pseudo-boolean optimization and related topics
ECAI '92 Proceedings of the 10th European conference on Artificial intelligence
ICCAD '92 1992 IEEE/ACM international conference proceedings on Computer-aided design
Theoretical Computer Science
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Efficient encoding for exact symbolic automata-based scheduling
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Symbolic model checking using SAT procedures instead of BDDs
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
A symbolic approach for the combined solution of scheduling and allocation
Proceedings of the 15th international symposium on System Synthesis
Minimum-Cost Reachability for Priced Timed Automata
HSCC '01 Proceedings of the 4th International Workshop on Hybrid Systems: Computation and Control
Optimal Paths in Weighted Timed Automata
HSCC '01 Proceedings of the 4th International Workshop on Hybrid Systems: Computation and Control
As Cheap as Possible: Efficient Cost-Optimal Reachability for Priced Timed Automata
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
Applying SAT Methods in Unbounded Symbolic Model Checking
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Scheduling Aircraft Landings--The Static Case
Transportation Science
Guided synthesis of control programs using UPPAAL
Nordic Journal of Computing
Scheduling a Steel Plant with Timed Automata
RTCSA '99 Proceedings of the Sixth International Conference on Real-Time Computing Systems and Applications
Task Graph Scheduling Using Timed Automata
IPDPS '03 Proceedings of the 17th International Symposium on Parallel and Distributed Processing
Accelerated SAT-based Scheduling of Control/Data Flow Graphs
ICCD '02 Proceedings of the 2002 IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD'02)
Effective Lower Bounding Techniques for Pseudo-Boolean Optimization
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Optimal scheduling using priced timed automata
ACM SIGMETRICS Performance Evaluation Review
Prime clauses for fast enumeration of satisfying assignments to boolean circuits
Proceedings of the 42nd annual Design Automation Conference
Optimization algorithms for the minimum-cost satisfiability problem
Optimization algorithms for the minimum-cost satisfiability problem
Efficient SAT-based unbounded symbolic model checking using circuit cofactoring
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
On using priced timed automata to achieve optimal scheduling
Formal Methods in System Design
Solving the minimum-cost satisfiability problem using SAT based branch-and-bound search
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Pushing the envelope: planning, propositional logic, and stochastic search
AAAI'96 Proceedings of the thirteenth national conference on Artificial intelligence - Volume 2
Efficient conflict analysis for finding all satisfying assignments of a boolean circuit
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
A new symbolic technique for control-dependent scheduling
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Search pruning techniques in SAT-based branch-and-bound algorithms for the binate covering problem
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A fast pseudo-Boolean constraint solver
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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The task graph cost-optimal scheduling problem consists in scheduling a certain number of interdependent tasks onto a set of heterogeneous processors (characterized by idle and running rates per time unit), minimizing the cost of the entire process. This paper provides a novel formulation for this scheduling puzzle, in which an optimal solution is computed through a sequence of binate covering problems, hinged within a bounded model checking paradigm. In this approach, each covering instance, providing a min-cost trace for a given schedule depth, can be solved with several strategies, resorting to minimum-cost satisfiability solvers or pseudo-Boolean optimization tools. Unfortunately, all direct resolution methods show very low efficiency and scalability. As a consequence, we introduce a specialized method to solve the same sequence of problems, based on a traditional all-solution SAT solver. This approach follows the "circuit cofactoring" strategy, as it exploits a powerful technique to capture a large set of solutions for any new SAT counter-example. The overall method is completed with a branch-and-bound heuristic which evaluates lower and upper bounds of the schedule length, to reduce the state space that has to be visited. Our results show that the proposed strategy significantly improves the blind binate covering schema, and it outperforms general purpose state-of-the-art tools.