Hardware-software co-design of embedded systems: the POLIS approach
Hardware-software co-design of embedded systems: the POLIS approach
Efficient encoding for exact symbolic automata-based scheduling
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
MAHA: a program for datapath synthesis
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Automata-based symbolic scheduling
Automata-based symbolic scheduling
A new symbolic technique for control-dependent scheduling
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
High-level synthesis of low-power control-flow intensive circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A novel SAT-based approach to the task graph cost-optimal scheduling problem
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Scheduling is widely recognized as a very important step in high-level synthesis. Nevertheless, it is usually done without taking into account the effects on the actual hardware implementation. This paper presents an efficient symbolic technique to concurrently integrate operation scheduling and resource allocation. The technique inherits all the features of "standard" BDD-based control dominated scheduling, including resource-constraining, speculation and pruning. In addition, it introduces an efficient way of encoding allocation information within a symbolic scheduling automaton with a two-folded target. Firstly, it finds a minimum cost allocation of operation resources satisfying a given schedule. Secondly, it optimizes the amount of registers required to store intermediate results of operations. Theory and algorithms are developed and presented. Experimental results on a well known set of benchmarks show the potentiality of the approach.