An Empirical Study of Retargetable Compilers
PSI '02 Revised Papers from the 4th International Andrei Ershov Memorial Conference on Perspectives of System Informatics: Akademgorodok, Novosibirsk, Russia
Automatic synthesis of gate-level timed circuits with choice
ARVLSI '95 Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95)
A BIST approach to delay fault testing with reduced test length
EDTC '95 Proceedings of the 1995 European conference on Design and Test
An efficient query learning algorithm for ordered binary decision diagrams
Information and Computation
Interpolating functions from large Boolean relations
Proceedings of the 2009 International Conference on Computer-Aided Design
An efficient query learning algorithm for ordered binary decision diagrams
Information and Computation
A novel SAT-based approach to the task graph cost-optimal scheduling problem
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Approximate logic synthesis under general error magnitude and frequency constraints
Proceedings of the International Conference on Computer-Aided Design
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